[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[oc] RE: Maybe I can help?




Tom,

If you have experience with ASIC synthesis it would be great to have someone
to write synthesis scripts and do ASIC design tweaks. I only use Verilog so
we need more ASIC designers who know VHDL participating.

I am hoping to contribute by doing ASIC synthesis, but as I work for a
start-up I use the same excuse as Damjan that there just aren't enough hours
in the day. (I am still amazed on how much he is able to contribute to
opencores.) I think ASIC synthesis is important because it allows the
participants to fully share the design across implementation options.

I would like to see a situation where commercial companies are using the
cores in various ASIC applications. By contributing to the cores, companies
can achieve better designs and cheaper designs than they could afford to
themselves. Perhaps creating something like a high-end open-source
DesignWare. Students, hobbyiests, and some commercial groups contributing to
the FPGA versions. Perhaps we will see binary distributions for standard
FPGA boards? (Maybe not so soon as I am paying >$1K for large FPGA chips.)

Most people only see open source software in the GNU/Linux CDs that they
buy. I think that most people will only see open source hardware by
purchasing high-quality low-cost products that incorporate open source
hardware hardware.
Best regards,

Joe


-----Original Message-----
From: Damjan Lampret [mailto:lampret@opencores.org]
Sent: Tuesday, February 29, 2000 7:00 AM
To: Tom Tesch
Cc: webmaster@opencores.org; administration@opencores.org
Subject: Re: Maybe I can help?


> Hi,
>
> I'm a (digital) ASIC-designer with experiece with synopsys software.

ASIC as std cell and similar or programmable ASIC (FPGA and alike)?

I guess most design that were verified for targeting FPGAs would need std
cell ASIC verification (I don't mean real implementation). It would be
enough to get some feedback if they work in ASIC, which libraries you used
and which tools, what was the post layout speed.

If you know VHDL then that is enough. I also know only VHDL.

> participate in the freeVHDL project, but I got no response from them.)
>  I'm very interested in paticipating in your project.  Who should I
> contact?
>