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Re: [oc] ATM Core



Hi,

   Is there a spec/pdf/doc  to what have been done so far so I can read it
and what is going to be done ?

I'm also using verilog, if this matter, and would like to know more about
this ATM phy core. My background so far was from the Ethernet world.

have a nice day

At 06:26 PM 05/25/2000 +0700, you wrote:
>
>
>Hi guys !
>
>I can design the ATM core if there is interest.
>
>I am already famillilar with the PHY interface (UTOPIA 3), what kind of an
>interface would you like to see on the other side ? I guess a DMA type of
>general i/f ? Did you guys try to define an internal i/f spec for various
>blocks so they could all talk to each other without to much glue ?
>
>One thing that should go along with the ATM Core is PHY Config I/F core.
>
>Cheers,
>rudi
>
>PS: using VCS verilog ...
>
>