Re: [oc] New WISHBONE Models

[arunabhdas@yahoo.com]

Dear Sir

I wanted to have a look at the Wishbone verilog model. Could you point
me to it?
Regards,
Das

----- Original Message ----- 
From: "Winefred Washington" <wwashington@a... > 
To: <cores@o... > 
Date: Sat, 20 Jan 2001 20:45:34 -0600 
Subject: [oc] New WISHBONE Models 

> 
> 
> This is just a note to let people know I've added two WISHBONE 
> Verilog 
> models and documentation to CVS. They are located in the wb_verilog 
> directory. 
> 
> The slave model is a direct port of the VHDL model listed in the 
> WISHBONE 
> spec. I am still testing the Master model, so use with caution. 
> 
> Thanks, 
> WW 
> 
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