[oc] Re: Problem in DMA IP Core Trace ?

[Rudolf Usselmann <rudi@asics.ws>]

On Tue, 2003-01-28 at 10:21, NansonHuang@ITRI.ORG.TW wrote:
> 
>  Hi,
> 
>   Now I am tracing the DMA IP Core. In the wb_dma_pri_enc_sub.v, it firstly
> defines the parameter pri_sel to 2'h0. Then it is used in "Select
> Configured Priority" mux.

The parameter pri_sel is passed on from higher hierarchy
to select the number of priority levels desired in any
given implementation. You are correct that pri_sel is
constant for a given implementation, however, different
users/implementations may have different values for pri_sel.

> However, it's value is 2'h0 always. Could someone explain the mux is
> necessary ? Synthesis tools will optimize it to dedicated value 2'd0:
> pri_out_d = pri_out_d0. Am I right ? How to explain the code ?

The mux is necessary to enable selecting the number of
priority levels. You are correct, the synthesis tools
will optimize the mux AND the logic for the unused
priority levels by removing them and replacing them
with wires.

>  Appreciate for any info.
> 
>  Nanson

Basically the additional overhead is to allow for the
selection of different number of priority levels. Once
the selection has been made, some of the code (and logic)
will be removed. However to provide a configurable Soft
IP core, I felt it would serve the most users by allowing
flexible (and easy to use) selection of the number of
priority levels.

Regards,
rudi
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