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[cvs-checkins] uart16550/rtl/verilog uart_transmitter.v



CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	gorban	02/02/14 16:32:08

Modified files:
	rtl/verilog    : uart_transmitter.v 

Log message:
	tf_overrun signal was disabled since it was not used

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