[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[fpu] fpu synthesis problem



Hi all,

I've tryed to do the fpu unit synthesis with FPGA Express verilog
compiler (under Xilinx Foundation IDE). This error appears:
* Operands to divide must be constants in routine called from div_r2
line 90 in file 'primitives.v'
Can anybody help me?
Thanks a lot.
--
-------------------------------------------------
|                   Juan A. Gomez                    |
|                                               |
| Univ.  Extremadura   | Univ. of Extremadura   |
|           Email: jangomez@unex.es             |
-------------------------------------------------


--
To unsubscribe from fpu mailing list please visit http://www.opencores.org/mailinglists.shtml