Re: [openrisc] Context switching...

["Damjan Lampret" <lampret@opencores.org>]

> So the OS can save/restore user process state easily (doesn't need to
> switch back to user mode to save/restore banked user register, etc).
>
> Q1: BTW, have you define the mechanism of processor's mode change? (e.g.
> which general/special regs are banked? etc.)
>

It is not offically defined yet in the manual but I think GPRs (possibly
also FPRs), SR, CCR and PC are banked (of course if implementation supports
this feature).

> Q2: What components does teh HW context consisted of? (e.g. on a VAX-11
> machine, they are GPR R0-R15, program status long word, base and length
> regs, stack pointers).

Isn't this similar to the previous Q?

regards, Damjan

PS Are you interested to help with the OR1K architecture? I can send you
manual sources. At the moment I am working on overall architecture and OR32,
Jimmy is working on OR16. Anyone else would like to help with the
architecture specification?