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[oc] Implement SDRAM Controller on SpartanII Device

To: <cores@opencores.org>
Subject: [oc] Implement SDRAM Controller on SpartanII Device
From: "Mr.Sun" <suenlei@163.net>
Date: Tue, 2 Apr 2002 22:32:02 +0800
References: <200203300118.CAA01145@iza.mr2.si> <DAV56mHAFnvDLVRpfZT0000da36@hotmail.com> <3CA8C0D8.CA81F160@intrinsix.com> <DAV25YC98Bi89QtpfTY0001bbd4@hotmail.com> <20020402073931.GI12455@wattle.taudelt> <DAV28ZgTQp7nzmG4ESd00004127@hotmail.com>
Reply-To: cores@opencores.org
Sender: owner-cores@opencores.org

Hello everyone,
I plan to implement a SDRAM Controller on a SpartanII Device.The FPGA chip I
want to use XC2S150-PQ208 and the SDRAM use a 144pin SDRAM SO DIMM based on
chip HYM72V32M636HT6.And I had downloaded a IP Core on web www.Xilinx.com
Site.Which is ftp://ftp.xilinx.com/pub/applications/xapp/xapp134_vhdl.zip.
I wonder if anyone had ever tested this IP Core,and even if anyone can give
me some adivce.
Best Regards,
Sun Lei
suenlei@163.net


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References:
- Re: [oc] Output loading in digital circuit
  - From: Steve Wilson <stevew@intrinsix.com>
- Re: [oc] Output loading in digital circuit
  - From: "Kenneth Hung" <hungwaiming@hotmail.com>
- Re: [oc] Output loading in digital circuit
  - From: John Sheahan <jrsheahan@optushome.com.au>
- Re: [oc] Output loading in digital circuit
  - From: "Kenneth Hung" <hungwaiming@hotmail.com>

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